universal ic programmer kit|flash ic programmer|Automated Device Programmers-System General

Acroview, a leader in chip programming, has officially announced further expansion of its compatible device coverage with the release of a new programming software version. Its flagship product – the universal programming platform AP8000 – has now achieved full adaptation with APTChip's 32-bit microcontroller APT32F1031K9U.

The APT32F1031K9U is a high-performance, low-cost 32-bit MCU developed by APTChip based on the T-Head Semiconductor RISC-V core. It is designed for applications including industrial control, touch-controlled home appliances, consumer electronics, and wearable devices.

• RISC-V 32-bit CPU core (1.55 DMIPS), supporting single-cycle multiplication, high-speed instruction cache, memory protection, and SWD debug

• Independent hardware divider

• 80 Kbytes on-chip program flash, independent 3 Kbytes data flash

• 8 Kbytes SRAM for stack and data storage

• Operating temperature: -40 to 85°C

• Operating voltage range: 1.8 to 5.5V

• Maximum operating frequency: 48MHz

• RISC-V CLIC interrupt controller: supports dynamically configurable nested interrupts

• Enhanced clock and power controller (SYSCON)

• Independent watchdog timer (IWDT)

• Window watchdog timer (WWDT)

• 1x6-channel DMA controller (DMA)

• 1x16-bit enhanced purpose timer/counter (EPT), each timer supports 7 PWM outputs, 6 of which can be configured as complementary with dead-time insertion

• 1x16-bit general-purpose timer/counter (GPT), supporting 2 PWM outputs

• 1x16-bit counter (COUNTERA), supporting auto-reload and one-shot or cyclic counting (carrier generator)

• 4x16-bit basic timers (BT)

• 1x16-bit low-power timer (LPT)

• 1x16-bit RTC

• Serial communication interfaces: 1xI2C, 3xUART, 1xUSART, 1xSPI, 1xSIO

• Up to 24-channel 12-bit ADC, supporting internal/external VREF input

• Supports 96-bit UID

• Up to 30 GPIOs, all configurable as external interrupts

• Supports three operating modes: RUN, SLEEP, and DEEP-SLEEP

• Up to 25 touch key controller channels

• 4 high-current drive pins (each supporting up to 120mA sink current)

Key Features

• Processor (CPU)
-- Supports RISC-V RV32E[M]C instruction set
-- 16 32-bit general-purpose registers
-- Efficient 2-stage execution pipeline
-- Single-cycle 32-bit x 32-bit hardware integer multiplier array (result supports only 32-bit)
-- SWD (Serial Wire Debug) interface

• Hardware Divider (HWDIV)
-- Signed or unsigned 32-bit integer division
-- Supports 32-bit dividend and 32-bit divisor, outputs 32-bit quotient and remainder
-- 5 HCLK cycles operation time
-- Supports divisor-zero overflow error interrupt

• Memory
-- 80 Kbytes internal program flash with ISP protection, configurable protection area size, and hardware CRC check
-- 3 Kbytes independent data flash; data flash programming does not affect program execution
-- User Option configuration: external reset pin enable, watchdog default enable state, code security configuration
-- Dedicated programming interface supporting high-volume production programming (requires dedicated programmer)
-- Up to 8 Kbytes internal SRAM with hardware CRC check
-- Little-endian storage

• Nested Interrupt Controller (CLIC)
-- Supports 48 interrupt sources (IRQ[47:0])
-- Each interrupt source has an independent interrupt vector number
-- Each interrupt source has independently programmable priority, interrupt type, trigger mode, and enable control
-- Supports dynamic priority adjustment during interrupt handling
-- Independent interrupt wake-up and interrupt enable configuration

• System Controller (SYSCON)
-- External crystal oscillator 400KHz to 24MHz (EMCLK: External Main Clock), with independent 32.768K configuration option
-- Internal main oscillator with 2.097MHz/4.194MHz/5.556MHz (default) selectable options (1% deviation @ typical, IMCLK: Internal Main Clock)
-- Internal high-speed oscillator 24MHz/48MHz (1% deviation @ typical, HFCLK: High Frequency Clock)
-- Internal auxiliary oscillator 27KHz (5% deviation @ typical, ISCLK: Internal Sub Clock)
-- All internal oscillators support software trimming
-- Supports low-power modes (SLEEP/DEEP-SLEEP)
-- Programmable power optimization in low-power modes
-- Programmable clock divider
-- External crystal failure detection (automatic switch to internal main oscillator upon external crystal failure)
-- External crystal jitter filtering
-- Digital filtering control for external interrupt inputs, supporting asynchronous counting for interrupt triggers
-- FLASH and SRAM error checking management, configurable retry or system reset
-- Reset source detection and management (RSTID)

• Independent Watchdog Timer (IWDT)
-- Programmable reset timeout: default 8 seconds
-- Configurable pre-reset alarm interrupt
-- Independent programmable 18-bit down-counter operating on internal auxiliary oscillator (27KHz clock)

• 16-bit Enhanced Purpose Timer/Counter (EPT)
-- Three counting modes: up, down, up-down
-- Each timer has 7 PWM outputs, including 4 waveform generation control units, supporting 4 independent outputs or 3 complementary output pairs
-- Supports complementary output, dead-time control, chopper output, and emergency mode output
-- Emergency mode output: soft-lock and hard-lock modes

• External input EPIx

• System error, LVD interrupt trigger
  -- Supports special register protection
  -- Supports one-shot trigger mode and external pulse counting mode
  -- 4 digital comparators can trigger multiple synchronization and waveform outputs
  -- Supports capture mode, up to 4 compare value captures
  -- Supports ETCB event linkage
  -- PCLK operating clock

• 16-bit General Purpose Timer/Counter (GPT)
-- Three counting modes: up, down, up-down
-- Each timer supports two output channels, each configurable for PWM waveform output control
-- Supports capture mode, up to 4 capture values
-- Supports ETCB event linkage
-- PCLK operating clock

• Carrier Frequency Generator (CNTA)
-- 16-bit counter with auto-reload and one-shot or cyclic counting
-- Software/hardware selectable carrier frequency output enable/disable control
-- Configurable high/low level pulse width within one waveform cycle
-- Configurable output polarity
-- Can be used for speaker drivers or remote IR data transmission

• Basic Timers (BT)
-- 4 16-bit up-counters with auto-reload
-- One compare value register, supporting PWM output (BT2 and BT3 do not support PWM output)
-- Supports one-shot trigger mode
-- Supports compare match interrupt, period interrupt, and overflow interrupt
-- Supports ETCB event linkage
-- PCLK operating clock

• Low-Power Timer/Counter (LPT)
-- 16-bit up-counter with auto-reload
-- One 16-bit compare value register, supporting PWM output
-- 3-bit prescaler selection: 1, 2, 4, 8, 16, 32, 64, 128 division
-- Supports multiple clock sources: ISCLK, IMCLK, EMCLK, PCLK, or external CLK
-- Supports toggle or PWM output function
-- Supports one-shot trigger mode
-- Supports period interrupt and match interrupt
-- Supports ETCB event linkage

• Real-Time Counter (RTC)
-- Only POR reset effective, with write protection
-- Timekeeping: supports hours (12/24-hour format), minutes, seconds, and sub-seconds, BCD format
-- Calendar: supports year, month, day, and weekday, BCD format; automatic leap year recognition
-- Selectable clock sources: external EMCLK (supports 32.768KHz), internal IMCLK, and internal ISCLK
-- Supports 2 programmable alarms
-- Supports periodic timing interrupt
-- Digital calibration
-- Supports ETCB event linkage
-- Programmable frequency output (via CLO)

• Window Watchdog (WWDT)
-- Based on PCLK
-- Supports pre-reset alarm interrupt
-- Software-triggered reset operation
-- Counter refresh window limiting

• Universal Asynchronous Receiver/Transmitter (UART)
-- 3 channels
-- 8-bit data length, supports parity (odd/even, 0/1 check)
-- Separate 8x8-bit transmit/receive FIFOs
-- Programmable fractional baud rate generator

• Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
-- 1 channel
-- Supports 5, 6, 7, and 8-bit data lengths
-- Separate 8x8-bit transmit/receive FIFOs
-- Programmable baud rate
-- Parity bit, frame detection, and buffer overflow error reporting
-- Supports Loop-back mode
-- Supports synchronous full-duplex mode
-- Supports LIN bus protocol: LIN1.2 or LIN2.0
-- Supports Smart Card protocol: ISO7816-3 compatible

• Synchronous Serial Bus (I2C)
-- 1 channel
-- Supports multi-master I2C bus, master or slave mode
-- Standard mode 100Kbit/s, fast mode up to 400Kbit/s, ultra-fast mode up to 1Mbit/s
-- Compatible with 8-bit serial and bidirectional data transfer
-- 7-bit or 10-bit addressing
-- Programmable SDA hold time
-- Automatic bus recovery
-- Separate 8x8-bit transmit/receive FIFOs

• Synchronous Peripheral Interface (SPI)
-- 1 channel
-- Programmable data frame length: 4 to 16 bits
-- Supports master and slave modes
-- Programmable clock prescaler
-- Supports single-wire transmit/receive mode
-- Separate 8x16-bit transmit/receive FIFOs

• Serial Input/Output Interface (SIO)
-- 1 channel, single-wire communication, bidirectional data transfer
-- Custom communication protocol and waveform output
-- In output mode, supports continuous output of up to 16 patterns
-- In receive mode, supports continuous 32-bit or pattern reception, with hardware sampling and automatic extraction, and input filtering

• 12-bit AD Converter
-- Up to 24 analog input channels, reference voltage supports VDD, external pin, INTVREF, or FVR
-- ADC input supports external ADCIN, GND, 1/5VDD, and internal high-precision voltage reference (INTVREF)
-- Supports up to 1MSPS conversion speed
-- Configurable sample-and-hold time
-- Supports continuous conversion mode and hardware automatic compare of conversion results
-- Supports multi-sequence conversion mode, up to 16 conversion sequences, with flexible configuration of channel, order, times, and priority
-- Supports ETCB event linkage

• Internal Voltage Reference (INTVREF)
-- Used as calibration input for ADC sampling channels
-- Used as VREF input for ADC (ADC must operate in low-speed mode)
-- Reference voltage: 1.0V

• Internal Fixed Voltage Reference (FVR)
-- Used as VREF input for ADC
-- Reference voltage: 2.048V / 4.096V

• Capacitive Touch Key Sensor (TKEY)
-- Self-capacitance detection analog front-end based on charge transfer principle
-- Supports scan frequency spreading and randomization for improved anti-interference
-- Supports 25 scan channels
-- Supports sequence scanning, up to 25 configuration units per sequence
-- Each channel has independently programmable sensitivity adjustment
-- Multiple scan trigger modes
-- Supports hardware automatic key detection and system wake-up

• CRC Controller
-- Supports byte, half-word, and word write operations
-- Selectable CRC polynomials include:

• CRC-CCITT: X16+X12+X5+1

• CRC-16: X16+X15+X2+1

• CRC-32: X32+X26+X23+X22+X16+X12+X11+X10+X8+X7+X5+X4+X3+X2+X+1
  -- Programmable seed value
  -- Input data and output data (CRC checksum) can be operated in complement form
  -- Programmable bit-reversal setting (LSB-first or MSB-first)

• Event Trigger Cross Bar (ETCB)
-- Supports configurable inter-module trigger connections on-chip
-- Up to 8 trigger channels
-- Each channel supports 64 source inputs
-- Each channel supports 64 target outputs
-- Each channel supports software trigger

• General Purpose I/O (GPIO)
-- 32-pin package: up to 30 GPIOs
-- Push-pull and open-drain configurable, pull-up/pull-down configurable
-- Independently configurable output drive strength and slew rate
-- Supports output state monitoring
-- Communication pins support TTL level input buffer configuration (TTL1/TTL2)
-- All pins support external interrupt function

• Two Low-Power Modes
-- SLEEP: turns off selected system clock and CPU clock
-- DEEP-SLEEP: turns off all system clocks and CPU clock
-- Configurable DEEP-SLEEP wake-up sources: external interrupt, IWDT interrupt, LPT interrupt, LVD interrupt, RTC interrupt, or touch key interrupt

• Power-On Reset (POR)

• Low-Voltage Detector (LVD)
-- Configurable low-voltage reset, with 8 selectable voltage levels (1.9V/2.2V/2.5V/2.8V/3.1/3.4/3.7/4.0)
-- Configurable low-voltage interrupt, with 8 selectable detection voltage levels (2.1V/2.4V/2.7V/3.0V/3.3/3.6/3.9/LVDIN)

• Operating Voltage Range
-- 1.8V to 5.5V

• Operating Frequency Range
-- External main crystal: 32KHz~24MHz
-- Internal oscillators: IMOSC: 5.556MHz (max) / HFOSC: 48MHz (max)
-- Internal auxiliary oscillator: 27KHz

• Operating Temperature Range
-- -40 to 85°C

• Packages
-- LQFP32
-- QFN32
-- SOP28
-- SSOP24

Block Diagram

Acroview's self-developed AP8000 universal programmer has become a benchmark professional programming solution in the industry. The device supports flexible and adjustable 1-to-1 and 1-to-8 configuration modes, and provides both online and offline operating modes. It also offers dedicated programming solutions for memory chips such as eMMC and UFS, and can fully cover bare-chip offline programming and on-board programming for APTChip's entire series of devices. The AP8000 adopts an innovative modular design with three core modules – mainframe, baseboard, and adapter socket – giving it excellent compatibility and scalability. As a universal programming platform, it not only adapts to various programmable chips on the market but also, with its stable and high-performance capabilities, serves as the core component of Acroview's automated batch programming system IPS5800S, efficiently handling large-scale chip programming tasks to meet mass production requirements.

The AP8000 mainframe features flexible connectivity, equipped with both USB and NET interfaces for easy networking of multiple programmers. Through networking, users can easily achieve synchronized control of multiple programmers for efficient parallel programming operations. In terms of security, the mainframe incorporates intelligent safety protection circuits that monitor chip placement status and circuit connections in real time. Once abnormalities such as reverse insertion or short circuits are detected, it immediately triggers a power-off protection mechanism, comprehensively safeguarding the safe operation of both chips and the programmer. The mainframe is equipped with a high-speed FPGA chip, significantly improving data transmission and processing efficiency to ensure smooth and efficient programming. For enhanced convenience, an SD card slot is provided on the rear panel. Users can store project files generated on a PC onto an SD card, insert it into the slot, and then use the physical buttons on the programmer to select, load, and execute programming operations, enabling standalone operation independent of a PC. This design not only reduces reliance on computer hardware but also simplifies workspace setup, greatly improving operational flexibility.

In terms of expandability and compatibility, the AP8000 adopts a modular combination of baseboard and adapter boards, effectively expanding the mainframe's capabilities. Currently, the device supports products from all major semiconductor manufacturers, covering well-known brands such as SK hynix, Micron, SANDISK, ASR, and Kingston. Its supported device types are extensive, including NAND, NOR, MCU, CPLD, FPGA, EMMC, etc., and it is fully compatible with industry-standard file formats such as Intel Hex, Motorola S, Binary, and POF, providing users with a one-stop, full-scenario chip programming solution.

Company Profiles

About APTChip: APTChip was founded in 2012 and is a high-tech enterprise focused on the R&D and design of fully domestic, fully autonomous, and highly reliable 32-bit microprocessor chips. It has grown into a leading enterprise in fully domestic 32-bit MCUs for smart home appliances, industrial control, and other fields. APTChip's mass-produced fully domestic high-reliability 32-bit MCU products, developed based on its self-developed IP library and RISC architecture cores, have achieved over 100 million units shipped and are widely used in industrial control, IoT, smart home appliances, and other market segments.

About Acroview: Acroview is a national-level "Little Giant" enterprise specializing in the R&D, production, and sales of semiconductor chip testing and programming equipment. The company is committed to empowering the entire industry chain – including Fabless, IDM, OSAT, wafer fabs, and end-device manufacturers – through innovative semiconductor testing technologies and solutions. Acroview's pioneering fully automated Burn-In system ABI (Auto Burn-In) greatly improves customers' chip burn-in testing efficiency and reduces per-DUT testing costs. It also provides equipment and solutions across all stages from PSV, CP, FT, ABI, SLT, to programming. By seamlessly integrating its leading product technology, system-level expertise, and globally deployed R&D and sales service networks, Acroview creates value for customers to gain a competitive edge in the market.