universal ic programmer kit|flash ic programmer|Automated Device Programmers-System General

Acroview, a leader in chip programming, has announced further expansion of its compatible chip model coverage alongside the release of a new version of its programming software. The company's core product—the universal programming platform AP8000—has now achieved full adaptation with Macronix's serial NOR flash memory, MX25R6435FBD.

The MX25R6435FBD is a 64Mb serial NOR flash memory, internally configured as 8,388,608 × 8 bits. When operating in quad I/O mode, its structure changes to 16,777,216 bits × 4 or 33,554,432 bits × 2.

The MX25R6435FBD features a serial peripheral interface (SPI) and software protocol, allowing operation via a simple three-wire bus in single I/O mode. The three bus signals are clock input (SCLK), serial data input (SI), and serial data output (SO). Serial access to the device is enabled via the CS# (chip select) input.

When operating in dual I/O read mode, the SI and SO pins become SIO0 and SIO1 pins, used for address/dummy bit input and data output. When operating in quad I/O read mode, the SI, SO, WP# (write protect), and RESET#/HOLD# (reset/hold) pins become SIO0, SIO1, SIO2, and SIO3 pins, used for address/dummy bit input and data output.

The MXSMIO® (Serial Multi I/O) function of the MX25R6435FBD supports sequential read operations across the entire chip. After issuing a program/erase command, an automatic program/erase algorithm is executed to program/erase and verify the specified page or sector/block address. Programming commands can be executed on a byte, page (256 bytes), or word basis; erase commands can be executed on a 4K-byte sector, 32K-byte block, 64K-byte block, or the entire chip. To facilitate user interface operation, the device includes a status register to indicate chip status. A status read command can be issued to detect the completion status of program or erase operations via the WIP (write in progress) bit.

The MX25R6435FBD uses Macronix's proprietary memory cells, reliably storing memory data even after 100,000 program and erase cycles.

Features

Overview

• Supports Serial Peripheral Interface (SPI) – Mode 0 and Mode 3

• Memory organization

• 67,108,864 × 1 bit structure

• or 33,554,432 × 2 bits (dual I/O mode) structure

• or 16,777,216 × 4 bits (quad I/O mode) structure

• Uniform sectors: 4K bytes per sector; uniform blocks: 32K/64K bytes per block

• Any block can be erased independently

• Single power supply

• Operating voltage: 1.65V–3.6V for read, erase, and program operations

• Latch-up protection: withstands 100mA from -1V to Vcc+1V

Performance Characteristics

• High performance

• Single I/O: 80MHz, 8 dummy clock cycles

• Dual I/O: 80MHz, 4 dummy clock cycles, equivalent to 160MHz

• Quad I/O: 80MHz, 2+4 dummy clock cycles, equivalent to 320MHz

• High-speed read (-40°C to 85°C):

• Fast program and erase times

• Supports 8/16/32/64-byte wrap-around burst read mode

• Ultra-low power consumption

• Program/erase endurance: 100,000 cycles minimum

• Data retention: 20 years

Software Features

• Input data format

• 1-byte command code

• Advanced security features

• Block lock protection

• Software-protected area size set via status register bits BP0–BP3, disabling program and erase commands

• Additional 8K-bit secure OTP area

• Unique identifier

• Factory-locked identifiable, supports customer locking

• Automatic erase and automatic program algorithms

• Automatically erases and verifies specified sectors or blocks

• Internal algorithm automatically controls program pulse width, programs and verifies specified pages (the page to be programmed must first be in an erased state)

• Status register function

• Command reset

• Program/erase suspend and program/erase resume

• Electronic identification functions

• JEDEC standard: 1-byte manufacturer ID + 2-byte device ID

• RES command: reads 1-byte device ID

• REMS command: reads 1-byte manufacturer ID + 1-byte device ID

• Supports Serial Flash Discoverable Parameters (SFDP) mode

• Supports unique ID

Hardware Features

• SCLK: Serial clock input

• SI/SIO0: Serial data input; or serial data input/output in dual I/O, quad I/O read modes

• SO/SIO1: Serial data output; or serial data input/output in dual I/O, quad I/O read modes

• WP#/SIO2: Hardware write protect; or serial data input/output in quad I/O read mode

• RESET#/SIO3* or HOLD#/SIO3*

• Hardware reset pin; or serial data input/output in quad I/O read mode

• Or hold function: pauses device operation without deselecting the chip or disconnecting serial input/output

• Depends on specific model option

• Package type

• 8-pin SOP (200mil)

• All devices are RoHS-compliant and halogen-free

Internal Block Diagram

Acroview's self-developed AP8000 universal programmer has become a benchmark professional programming solution in the industry. The device supports flexible and adjustable 1-to-1 and 1-to-8 configuration modes, offers both online and offline operating modes, and features dedicated programming solutions for memory chips such as eMMC and UFS, fully covering bare-chip offline programming and on-board programming needs for the entire Macronix chip series. The AP8000 adopts an innovative modular design of three core modules: mainframe, baseboard, and adapter socket, giving the device excellent compatibility and expandability. As a universal programming platform, it not only adapts to various programmable chips on the market but also serves as the core component of Acroview's automated batch programmer IPS5800S with stable and efficient performance, efficiently handling large-scale chip programming tasks to meet mass production requirements.

The AP8000 mainframe features flexible connectivity, equipped with both USB and NET interfaces, enabling convenient networking of multiple programmers. Through networking capabilities, users can easily achieve synchronized control of multiple programmers and efficiently perform parallel programming operations. In terms of safety, the mainframe includes an intelligent safety protection circuit that monitors chip placement status and circuit connections in real time. If abnormalities such as reverse chip insertion or short circuits are detected, it immediately triggers power-off protection, comprehensively safeguarding the safe operation of chips and the programmer. The mainframe is equipped with a high-speed FPGA chip, greatly improving data transmission and processing efficiency to ensure a smooth and efficient programming process. To enhance ease of use, an SD card slot is provided on the back of the mainframe. Users only need to save the project file generated on a PC to an SD card and insert it into the slot, then select, load, and execute programming via the programmer's physical buttons, achieving independent operation without a PC. This design not only reduces dependence on computer hardware configuration but also simplifies the working environment setup process, significantly improving operational flexibility.

In terms of expandability and compatibility, the AP8000 uses a modular combination design of baseboard and adapter board, effectively expanding the mainframe's functional boundaries. Currently, the device supports products from all major semiconductor manufacturers, covering well-known brands such as SK Hynix, Micron, SANDISK, ASR, and Kingston. The types of supported devices are extensive, including NAND, NOR, MCU, CPLD, FPGA, EMMC, etc., and it is fully compatible with multiple industry-standard file formats such as Intel Hex, Motorola S, Binary, and POF, providing users with a one-stop, full-scenario chip programming solution.

Company Introduction

About Macronix: Macronix, a leader in innovative non-volatile semiconductor memory solutions, is the world's largest supplier of ROM and serial NOR Flash products. Its products are used in consumer, communications, computer, automotive electronics, and other related fields. Macronix is one of the few companies globally capable of providing a complete Serial Flash product line from 512Kbit to 256Mbit, and offers extremely small-form-factor Flash products, fully meeting the demand for increasingly lighter, thinner, and smaller portable electronic products.

About Acroview: Acroview is a national-level "Little Giant" specialized and sophisticated enterprise engaged in the R&D, production, and sales of semiconductor chip testing and programming equipment. The company is committed to empowering the entire industrial chain, including fabless companies, IDMs, OSATs, wafer fabs, and end-device enterprises, through innovative semiconductor testing technology and solutions. Acroview's pioneering fully automatic burn-in test ABI (Auto Burn-In) system greatly enhances customer chip burn-in test efficiency and reduces per-DUT test costs. It also provides equipment products and solutions for each stage including PSV, CP, FT, ABI, SLT, and programming. The company perfectly integrates its leading product technology advantages, system-level expertise, and globally deployed R&D and sales service networks to create value for customers in gaining a competitive edge in the market.