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Taiwan System General:

Address: 6th Floor, No. 205-3, Section 3, Beixin Road, Xindian District, New Taipei City

Phone: +886-2-89131997

Fax: +886-980503633

Email: info@sg.com.tw

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Fax: 18002554660

Email: sales@acroview.com

Acroview Programmer Supports Aurasemi's Jitter-Attenuating Clock AU5619B00-QMR

Author: System Generalrelease date:2026-11-09Viewers:16

Acroview Technology, a leader in chip programming, has announced an expansion of its compatible chip model range with the release of a new version of its programming software. Its universal programming platform AP8000 now fully supports Aurasemi's jitter-attenuating clock AU5619B00-QMR, providing customers with efficient and reliable professional programming support.

The AU5619B00-QMR provides a programmable dual-channel fractional-frequency-conversion-based jitter-attenuating clock synthesizer, offering flexible input-to-output frequency conversion options. Its ultra-high-performance DPLL supports up to 4 differential and 8 single-ended input clocks. Two fractional frequency converters can be independently selected for the clock, and 12 clock outputs are provided. Clock outputs are derived from the two PLLs in a highly flexible manner.

The AU5619B00-QMR is housed in a 9×9 mm QFN package and uses an external crystal. The device can be configured via an I2C/SPI interface, or customer-required configurations can be factory-programmed into the device's non-volatile memory (NVM). The NVM supports one-time programming.

AU5619B00-QMR

Performance

• Ultra-high-performance PLL fully integrated design, requiring no external components
• 85 fs typical RMS integrated jitter (12 kHz–20 MHz)
• 70 fs typical RMS integrated jitter (with embedded crystal LGA package)
• 122.88 MHz output with excellent close-in phase noise performance
• Fully flexible output and input multiplexers: high flexibility in PLL output distribution
• JESD204B/C support for data converter clocks
• External EEPROM supports frequency control DCO: DCO control is provided on all outputs (0.001 ppt)
• Phase control DCO: fine phase adjustment knob (adjustment accuracy <1 ps) for the phase of all PLL outputs in closed-loop and open-loop modes
• Best-in-class seamless switching: PBO phase jump below 25 ps; PPG mode and FrequencyRamp mode provide adjustable frequency/phase slopes
• Fully integrated bandwidth-programmable loop filter for jitter and wander attenuation, down to 0.09 mHz
• Repeatable input-to-output delay with output relative delay adjustment
• Input-to-output delay variation of less than 0.5 ns in internal ZDB mode (this mode can be independently enabled for each PLL)
• Outputs can be phase-aligned on independent synchronization pulses
• Available in a 64-pin 9×9 mm QFN/LGA package; integrated embedded crystal option is available at ordering

Applications

• Telecom-grade Ethernet
• OTN equipment
• Microwave backhaul
• Gigabit Ethernet
• Wireless infrastructure
• Network line cards
• Small cells
• Data center/storage
• SONET/SDH
• Test/instrumentation
• Broadcast video


Functional Block Diagram

Functional Block Diagram

The AP8000 universal programmer independently developed by Acroview Technology has become a benchmark professional programming solution in the industry. The device supports flexible and adjustable one-to-one and one-to-eight configuration modes and provides online and offline dual operating modes. In particular, dedicated programming solutions have been developed for storage chips such as eMMC and UFS, fully covering bare-die offline programming and on-board programming requirements for the entire Aurasemi chip series. The AP8000 adopts an innovative modular design with three core modules—main unit, base board, and adapter socket—giving the device excellent compatibility and expandability. As a universal programming platform, it can not only support various programmable chips on the market, but also, with stable and efficient performance, serves as a core component of Acroview's automated mass programming equipment IPS5800S, efficiently handling large-scale chip programming tasks and meeting mass production requirements.

AP8000_Universal Programmer_Chip Programmer

The AP8000 main unit offers flexible connection methods and is equipped with both USB and NET interfaces, enabling convenient networking of multiple programmers. Through the networking function, users can easily achieve synchronous control of multiple programmers and efficiently carry out parallel programming operations. In terms of security, the main unit has a built-in intelligent safety protection circuit that can monitor chip placement status and circuit connection conditions in real time. Once abnormalities such as reverse chip insertion or short circuits are detected, it immediately triggers a power-off protection mechanism, safeguarding the safe operation of chips and the programmer in all aspects. The main unit is equipped with a high-speed FPGA chip, greatly improving data transmission and processing efficiency and ensuring a smooth and efficient programming process. To enhance ease of use, an SD card slot is provided on the back of the main unit. Users only need to store project files generated on a PC to an SD card and insert it into the slot, then complete file selection, loading, and programming operations through the programmer's physical buttons, achieving standalone operation without a PC. This design not only reduces dependence on computer hardware configuration but also simplifies the work environment setup process and significantly improves operational flexibility.

In terms of expandability and compatibility, the AP8000 adopts a modular combination design of base board and adapter board, effectively expanding the functional boundaries of the main unit. At present, the device supports products from all mainstream semiconductor manufacturers, covering well-known brands such as HAAWKING, XHSC, ZHIXIN, SAMSUNG, and KIOXIA. It supports a wide range of device types, including NAND, NOR, MCU, CPLD, FPGA, eMMC, etc., and is fully compatible with multiple industry-standard file formats such as Intel Hex, Motorola S, Binary, and POF, providing users with a one-stop, full-scenario chip programming solution.

Company Introduction

About Aurasemi: Aurasemi was founded in 2018 and focuses on the R&D of high-performance, high-quality, and high-reliability integrated circuit products, including five major product series: clock analog chips, power management analog chips, RF analog chips, MEMS sensors, and water meter sensors. Its applications cover many fields such as information and communications, data centers, IoT, and automotive. Aura was founded in Bangalore, India, in 2010 and was acquired and integrated into Aurasemi in January 2018.

About Acroview Technology: Acroview Technology (Acroview) is a national-level specialized, refined, distinctive, and innovative "Little Giant" enterprise engaged in the R&D, production, and sales of semiconductor chip test and programming equipment. The company is committed to empowering customers across the entire industry chain, including Fabless, IDM, OSAT, wafer Fab, and end-device companies, through innovative semiconductor test technologies and solutions. Acroview's pioneering fully automated Auto Burn-In (ABI) system greatly improves customers' chip burn-in test efficiency and reduces per-DUT test costs. It also provides equipment products and solutions covering PSV, CP, FT, ABI, SLT, and programming stages. We perfectly integrate leading product technology advantages, system-level expertise, and a globally deployed R&D and sales service network to create value for customers to gain leadership in market competition.

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System General Limited

Address:6F,No.205-3, Sec.3, Beixin Rd., Xindian Dist.,New Taipei City 23143, Taiwan

TEL: +886-2-89131997

Fax: +886-980503633

Email: info@sg.com.tw

Acroview Technology Co.,Ltd.

Address:3F , Blg 7 West, Sinosteel Building, Maque Industry  VillageNanshan, Shenzhen, 518057, Guangdong

TEL:+ 86 075526971006

Mobile phone:18002554660

Email:sales@acroview.com

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